February 11, 2025

An ethernet driver for Zynq on Kyu - Round 1 -- information

Chapter 16 (page 484) in the TRM covers the ethernet controller. Appendix B has register details (page 1267).

The Zynq has two ethernet interfaces! My boards all just use one. I will ignore the second one and take no pains to write a drive that is capable of handling both.

This will be my first gigabit ethernet driver. The controller is 10/100/1000. All of my boards except one (the Ebaz) have a gigabit capable Phy.

I intend to start work using the Antminer S9 board which uses the Broadcom B50612E Phy device. But I will say no more about Phy issues here, I have another section dedicated to that. In fact I will probably just start up writing a driver that ignores the Phy device and inherits the setup done by U-boot.

U-boot sources

I recently have been able to build U-boot from source for the Antminer S9 board using:
/u1/Projects/Zynq/U-boot/u-boot-2020/drivers/net
For the record, I use "bitmain_antminer_s9_defconfig".
We do not define CONFIG_SYS_64BIT.
We do define CONFIG_NET_RANDOM_ETHADDR

Having a U-boot source tree that has generated a build is immensely helpful as the ".o" files serve as breadcrumbs for exactly which files were used in the build. For example look at the directory u-boot-2020/drivers/net. It has 108 .c and .h files, but when we take a look at the .o files we see:

pwd
/u1/Projects/Zynq/U-boot/u-boot-2020/drivers/net
ls -l *.o
-rw-r--r-- 1 tom tom 48664 Jan 22 12:02 built-in.o
-rw-r--r-- 1 tom tom 48560 Jan 22 12:02 zynq_gem.o
We can ignore "built-in.o" as it is part of the build system and collects all the object files for the current directory.

So we are left with one file:

zynq_gem.c
This is 783 lines of C source. It does not seem to have a companion ".h" file as many drivers do and is relatively self contained, which is nice.

Buffer Descriptor

The source file uses "bd", which seems to mean "buffer descriptor".

The "probe" routine allocates memory for these. They need to comply with certain DMA alignment rules. As always, with DMA, care must be taken with flushing and invalidating of caches


Feedback? Questions? Drop me a line!

Tom's Computer Info / [email protected]